Course Schedule and Assignments


Week Date Labs
Week 1 [8/23-8/29] Lab 1 Boolean Logic and Verilog
Week 2 [8/30-9/5] Lab 2 Building an ALU
Week 3 [9/6-9/12] Lab 3 Finite State Machines
Week 4 [9/13-9/19] Lab 4 Building a basic processor
Week 5 [9/20-9/26] Lab 5 Building a complete processor
Week 6 [9/27-10/3] Lab 6 Basic Programming in MIPS
Week 7 [10/4-10/10] Lab 7 Advanced MIPS
Week 8 [10/11-10/17] Lab 8 Input/Output
Week 9 [10/18-10/24] Lab 9 Controlling the SPIMbot
Week 10 [10/25-10/31] Lab 10 Pipelining and Performance
Week 11 [11/1-11/7] Lab 11 Cache Simulator
Week 12 [11/8-11/14] Lab 12 Improving performance with caches
Week 13 [11/15-11/21]  
Week 14 [11/29-12/5]  
Week 15 [12/6-12/9] Lab 14 SPIMbot competition
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Lecture Recordings

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Week 1

01 - Boolean Functions, Gates, and Truth Tables - [8/24]
Lab I-Introduction to Verilog and Tools
02 - Combinational Logic Design - [8/26]
03 - Number Representation & Binary Arithmetic - [8/28]

Week 2

04 - Building an ALU - [8/31]
Lab II-Building an ALU
05 - Building an ALU, cont. - [9/2]
06 - Finite State Machine - [9/4]

Week 3

07 - Register File - [9/7 and 9/9]
Lab III-Combinational and Sequential Design
08 - More Finite State Machine - [9/11]

Week 4

09 - The Arithmetic Machine - [9/14]
Lab IV-The Arithmetic Machine
10 - The Arithmetic Machine - [9/16]
11 - MIPS Control & Loops - [9/18]

Week 5

12 - MIPS Loads & Stores - [9/21]
Lab V-The Complete Processor
13 - MIPS Exam 3 Review (Optional) - [9/23]
14 - Assembly Programming I - [9/25]

Week 6

15 - Assembly Programming II - [9/28]
Lab VI-Control Flow and Calling Conventions
16 - Pointers - [9/30]
17 - Recursion - [10/2]

Week 7

18 - I/O and Interrupts - [10/5]
Lab VII-Pointers and Recursion
19 - Performance and Profiling - [10/7]
20 - Pipelining the MIPS Datapath - [10/9]

Week 8

21 - Forwarding - [10/12]
Lab VIII-IO and Interrupts
Sundry Assembly OR Review Session (Optional) - [10/14]
Exam 5 Review Session (Optional) - [10/16]

Week 9

23 - Stalls and Flushes - [10/19]
Lab IX-SPIMbot interrupts
24 - Cache Introduction - [10/21]
Pipelined Architecture since 1985 - [10/23]

Week 10

25 - Cache Organization (Block size & Associativity) - [10/26]
Lab X-Pipelining-I
26 - Cache Performance and Memory access patterns - [10/28]
Memory access patterns, cont. - [10/30]

Week 11

Pipelining Review Session (optional) - [11/2]
Lab XI-Caches-I
27 - Cache Writing and Prefetching - [11/4]
28 - Writing Cache Friendly Code - [11/6]

Week 12

Writing Cache Friendly Code, part 2 - [11/9]
Lab XII-Caches-II
Exam 6 Review (optional) - [11/11]
Exam 6 Review (optional) - [11/13]

Week 13

29 - Virtual Memory & Disks - [11/16]
31 - SIMD 1 - [11/18]
SIMD 2 - [11/20]

Fall Break


Week 14

Exam 6 Review - [11/30]
Lab XIII-SIMD
33 - Multi-core and Thread contexts - [12/2]
Cache Coherence and Memory Consistency (cont.) - [12/4]

Week 15

Hardware Atomic Operations - [12/7]
Lab XIV-SPIMBot
SPIMbot contest - [12/9]